ICs & ChipsCode 0126149082
Nand Gate CD4011 IC CMOS Quad 2 Input Nand Gate
CD4011BE IC CMOS Quad 2 Input NAND Gate is a logic gate which produces an output which is false only if all its inputs are true.
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Highlights
- Propagation delay time = 60 ns (typ.) at CL = 50 pF, VDD = 10 V
- Buffered inputs and outputs
- Standardized symmetrical output characteristics
- The maximum input current of 1 µA at 18 V over-full package temperature range; 100 nA at 18 V and 25°C
- 100% tested for quiescent current at 20 V
- 5-V, 10-V, and 15-V parametric ratings
- Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of "B" Series CMOS Devices"
Specifications
- Lead Finish
- Gold
- Logic Function
- NAND
- Maximum Quiescent Current
- 5 uA
- Mounting
- Through Hole
- Operating Temperature
- 55 to 125 °C
- Pin Count
- 14
- Product Dimensions
- 19.05 x 6.35 x 3.3 mm
- Supplier Package
- PDIP
- Typical Quiescent Current
- 0.02 uA
About this product
CD4011BE IC CMOS Quad 2 Input NAND Gate is a logic gate which produces an output which is false only if all its inputs are true. CD4011BE IC CMOS Quad 2 Input NAND Gate are NAND gates provide the system designer with direct implementation of the NAND function and supplement the existing family of CMOS gates. All inputs and outputs are buffered. The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PWR suffix). The CD4011B and CD4023B types also are supplied in 14-lead thin shrink small-outline packages (PW suffix). We have also ATMEGA8L , AT89S51 CMOS 8 Bit Microcontroller , PIC18f452 Microcontroller etc. Features of CD4011BE IC CMOS Quad 2 Input NAND Gate: • Propagation delay time = 60 ns (typ.) at CL = 50 pF, VDD = 10 V • Buffered inputs and outputs • Standardized symmetrical output characteristics • The maximum input current of 1 µA at 18 V over-full package temperature range; 100 nA at 18 V and 25°C • 100% tested for quiescent current at 20 V • 5-V, 10-V, and 15-V parametric ratings • Noise margin (over full package temperature range: 1 V at VDD = 5 V 2 V at VDD = 10 V 2.5 at VDD = 15 V • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of "B" Series CMOS Devices" Specifications of CD4011BE IC CMOS Quad 2 Input NAND Gate: Description | Value | Lead Finish | Gold | Logic Function | NAND | Maximum Operating Supply Voltage | 18 V | Maximum Propagation Delay Time @ Maximum CL |…
