Microcontroller ICsCode cbc386a4d5
ATMEGA 328P ATMEGA328P-PU MICROCONTROLLER
The ATMEGA328P-PU is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture.
- Delivery in 2 to 4 working daysFree in Islamabad & Rawalpindi above Rs 5,000
- Cash on deliveryPay when your parcel arrives
- 7-day checking warrantyDead-on-arrival items replaced
- Packed with careAnti-static & padded packaging
Highlights
- High Performance, Low Power Design
- 8-Bit Microcontroller Atmel AVR advanced RISC architecture • 131 Instructions most of which are executed in a single clock cycle
- Up to 20 MIPS throughput at 20 MHz
- 32 x 8 working registers
- 2 cycle multiplier
- Memory Includes • 32KB of of programmable FLASH
- 1KB of EEPROM
- 2KB SRAM
Specifications
- Speed Grades
- • 0-4 MHz at 1.8-5.5V
- Power-down Mode
- 0.1A
- Power-save Mode
- 0.8A (Including 32 kHz RTC)
About this product
The ATMEGA328P-PU is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega328P-PU achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed.
The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU),allowing two independent registers to be accessed in one single instruction executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers.
The ATmega328P-PU AVR is supported with a full suite of program and system development tools including: C Compilers, Macro Assemblers, Program Debugger/Simulators, In-Circuit Emulators, and Evaluation kits.
The ATMEGA328P-PU is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega328P-PU achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed.
The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU),allowing two independent registers to be accessed in one single instruction executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers.
The ATmega328P-PU AVR is supported with a full suite of program and system development tools…
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