ICs & ChipsCode 36f2bad2d4
74LS76 IC
This device 7476 contains two independent positive pulse triggered J-K flip-flops with complementary outputs.
- Delivery in 2 to 4 working daysFree in Islamabad & Rawalpindi above Rs 5,000
- Cash on deliveryPay when your parcel arrives
- 7-day checking warrantyDead-on-arrival items replaced
- Packed with careAnti-static & padded packaging
About this product
This device 7476 contains two independent positive pulse triggered J-K flip-flops with complementary outputs. The J and K data is processed by the flip-flop after a complete clock pulse. While the clock is LOW the slave is isolated from the master. On the positive transition of the clock, the data from the J and K inputs is transferred to the master. While the clock is HIGH the J and K inputs are disabled. Features 2. Outputs Directly Interface to CMOS, NMOS and TTL 5. High Noise Immunity Characteristic of CMOS Devices 6. In Compliance With the JEDEC Standard No. 7A Requirements
